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Transputer hardware and system design

By: Contributor(s): Material type: TextTextPublication details: Nueva York : [S.n.], 1993Edition: 1st edDescription: x, 286 p. : il. ; 23 cmISBN:
  • 0139530010
Subject(s):
Contents:
Transputer architecture -- The two-cycle memory interface -- Designing with the two-cycle memory interface -- The three-cycle programmable memory interface -- Designing with the programmable three-cycle memory interface -- Transputer system interconnection -- System testing and debugging -- The T9000 second-generation transputer -- App. A. Instruction set overview -- B. Transputer versions -- C. PAL design equations -- E. Extracts from device data sheets -- F. Example programs.
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Item type Home library Call number Status Date due Barcode
Libro Libro Biblioteca de la Facultad de Informática C.1.2 HIN (Browse shelf(Opens below)) Available DIF-00702

Incluye glosario y bibliografía. --

Transputer architecture -- The two-cycle memory interface -- Designing with the two-cycle memory interface -- The three-cycle programmable memory interface -- Designing with the programmable three-cycle memory interface -- Transputer system interconnection -- System testing and debugging -- The T9000 second-generation transputer -- App. A. Instruction set overview -- B. Transputer versions -- C. PAL design equations -- E. Extracts from device data sheets -- F. Example programs.

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